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MRF89XA
2.6
MRF89XA Operating Modes
2.6.1
MODES OF OPERATION
(Includes Power-Saving Mode)
This section summarizes the settings for each
operating modes of the MRF89XA to save power that
are based on the operations and available functionality.
The timing requirements for switching between modes
described in Section 5.3, Switching Times and
Procedures .
Table 2-3 lists the different operating modes of the
MRF89XA, which can be used to save power.
2.6.2 DIGITAL PIN CONFIGURATION VS.
CHIP MODE
Table 2-4 lists the state of the digital I/Os in each of the
above described modes of operation, regardless of the
data operating mode (Continuous, Buffered, or
Packet).
TABLE 2-3:
OPERATING MODES
Mode
Sleep
Stand-by
FS
Receive
Transmit
CMOD<2:0> bits
(GCONREG<7:5>
000
001
010
011
100
Active Blocks
SPI, POR.
SPI, POR, Top regulator, digital regulator, XO, CLKOUT (if activated through
CLKOREG).
Same as Stand-by + VCO regulator, all PLL and LO generation blocks.
Same as FS mode + LNA, first mixer, IF amplifier, second mixer set, channel filters,
baseband amplifiers and limiters, RSSI, OOK or FSK demodulator, BitSync and all
digital features if enabled.
Same as FS mode + DDS, Interpolation filters, all up-conversion mixers, PA driver,
PA and external PARS pin (pin 29) output for the PA choke.
TABLE 2-4:
PIN CONFIGURATION VS. CHIP MODE
Chip . Mode
Pin
Sleep
Mode
Stand-by
Mode
FS Mode
Receive Transmit
Mode Mode
Comment
SDO
CSCON
CSDAT
(4)
SDI
SCK
IRQ0 (3)
Input
Input
Output
Input
Input
High-Z
Input
Input
Output
Input
Input
Output (1)
Input
Input
Output
Input
Input
Output (1)
Input
Input
Output
Input
Input
Output
Input
Input
Output
Input
Input
Output
CSCON has priority over CSDAT.
—
Output only if CSCON or CSDAT = 0 .
—
—
—
IRQ1
(3)
High-Z
Output
(1)
Output
(1)
Output
Output
—
DATA
CLKOUT
Input
High-Z
Input
Output
Input
Output
Output
Output
Input
Output
—
—
PLOCK
High-Z
Output
(2)
Output (2)
Output (2)
Output (2)
—
Note 1:
2:
3:
4:
High-Z if Continuous mode is activated; otherwise, Output.
Output if LENPLL = 1 ; otherwise, High-Z.
Valid logic states must be applied to inputs at all times to avoid unwanted leakage currents. Suggestions
for designers,
? Use external pull down resistor.
? Tristate the Microcontroller interrupt pin to output when setting the MRF89XA to sleep. Then reverse
when waking it up. Since the Microcontroller is in control, this should be easy to do and not require
an external pull down resistor.
The SDO pin defaults to a high impedance (High-Z) state when any of the CS pins are high (the MRF89XA
is not selected).
DS70622C-page 18
Preliminary
? 2010–2011 Microchip Technology Inc.
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